[原創] 流水线加法器

若放弃

[這个贴子最后由yh919在 2005/08/27 02:49am 第 1 次编辑]

`timescale  1ms/1us
module adder1(a,b,cin,sum,cout);
input a,b,cin;
output sum,cout;
assign {cout,sum}=a+b+cin;
endmodule
module adder4(a,b,cin,sum,cout);
input [3:0] a,b;
input cin;
output [3:0] sum;
output cout;
wire [2:0] temp;

adder1 add1(a[0],b[0],cin,sum[0],temp[0]);
adder1add2(a[1],b[1],temp[0],sum[1],temp[1]);
adder1 add3(a[2],b[2],temp[1],sum[2],temp[2]);
adder1 add4(a[3],b[3],temp[2],sum[3],cout);

endmodule

module D_4(D4,Q,clk);
input [3:0] D4;
input clk;
output [3:0] Q;
reg [3:0] Q;

always@(posedge clk)
  begin
   Q=D4;  
  end
  
endmodule
  
module D_5(D5,Q,clk);  
input [4:0] D5;
input clk;
output [4:0] Q;
reg [4:0] Q;

always@(posedge clk)
  begin
   Q=D5;  
  end
  
endmodule

module D_adder8(a,b,cin,sum,cout,clk);
input [7:0] a,b;
input cin,clk;
output [7:0] sum;
output cout;  
wire [7:0] sum0,a0,b0;
wire cout0,cin0;

D_5 DL0({a[3:0],cin},{a0[3:0],cin0},clk);
D_4 DL1(b[3:0],b0[3:0],clk);
D_4 DH0(a[7:4],a0[7:4],clk);
D_4 DH1(b[7:4],b0[7:4],clk);
adder4 add_L(a0[3:0],b0[3:0],cin0,sum0[3:0],cout_L);
adder4 add_H(a0[7:4],b0[7:4],cout_L,sum0[7:4],cout_H);
D_4 DL2(sum0[3:0],sum[3:0],clk);
D_5 DH2({cout_H,sum0[7:4]},{cout,sum[7:4]},clk);

endmodule


module D_adder8_stimulus;  测试模块
reg [7:0] a,b;
reg cin,clk;
wire [7:0] sum;
wire cout;
D_adder8 add(a,b,cin,sum,cout,clk);
initial
  begin
   clk=0;
   cin=1;
   #4 for(a=0;a<16;a=a+1)
       for(b=0;b<16;b=b)
    #10 b=b+1;
  end
always#5 clk=~clk;
endmodule

若放弃

八位的,行为级代码,希望大家帮忙看看.接下去我得干些什么?希望大家说说看.